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Senior Soft IP Validation Engineer

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17.10.2021
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IntelSenior Soft IP Validation EngineerMalaysia
Details

Develops preSilicon functional validation tests to verify system will meet design requirements. Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing.


The applicant should have at least a Bachelor degree in Electrical and Electronics or Computer or equivalent Engineering or higher and about ten years of experience in RTL design or verification- Experience in SystemVerilog OVM UVM, RTL model build or testbench development
- Capable of developing test plans, test contents and coverage points for verification purpose based on high-level architecture specification
- Experience in PCI Express or any standard HSSIO protocol would be added value
- Familiarity or experience in RTL design with Verilog and/or VHDL is a strong plus
- Familiarity or experience in Formal Property Verification would be of added value
- Strong programming skill in Perl C and shell scripts
- Strong analyzing and debugging skills and creativity in problem-solving
- Solid communication skill
- Highly motivated to learn and adapt to fast-evolving technologies and environments

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