Qualcomm Physical Design Engineer - DSP 

United States, Texas, Austin 

531284718

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

Responsibilities:

Include various aspects of physical design and implementation of DSP.

Work on activities related to synthesis. hard macro integration, placement, clock tree synthesis (CTS), routing, and overall physical design convergence.

deliverables include floorplanning, power grid implementation, secondary PG grid planning and other floorplan related tasks.

Update the physical implementation flows for optimum PPA (power, performance, and area).

• Perform synthesis placement and create handoffs to top-level chip teams.

• Lead the core level timing ECOs.

• Drive the development of semi-custom design techniques where appropriate to maximize utilization, performance, and power efficiency.

• Use and extend/enhance design methodologies to achieve the best PPA through scripting.

• Work independently with little supervision.

• Use verbal and written communication skills to convey complex and/or detailed information to multiple individuals/audiences with differing knowledge levels. May require strong negotiation and influence, communication to large groups or high-level constituents.

• Have a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to provide input on key decisions).

• Complete tasks that do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach; mistakes may result in significant rework.

• Exercise substantial creativity to innovate new processes, procedures, or work products within guidelines or to achieve established objectives.

• Use deductive and inductive problem solving; multiple approaches may be taken/necessary to solve the problem; often information is missing or conflicting; advanced data analysis and interpretation skills are required.

• Occasionally participate in strategic planning within own area affecting immediate operations.

• Use tools/applications (i.e., Cadence, RTL Compiler, etc.) to execute advanced architecture and design of multiple complex blocks and makes suggestions for design protocol.

• Develop an implementation strategy that meets system requirements and customer needs for team.

• Effectively utilize advanced problem solving and ASIC engineering practices to resolve complex architecture, design, or verification problems.

• Own the design and verification strategies of ASICs, SoC, and IP cores, reviews the strategies of more junior team members, and develops strategies for multiple blocks or IC Packages.

• Review complex tests from more junior team members and completes own tests to ensure that bugs are fully understood and analyzed.

• Run advanced power checks on multiple blocks to ensure design specifications are met; makes recommendations to leadership when specifications are not met.

Qualifications

• Bachelor's degree in Science, Engineering, or related field.

• 2+ years ASIC design, verification, or related work experience.

• Strong proficiency in P&R, timing analysis, physical verification, and IR drop analysis CAD tools (e.g., Synopsys FC/ICC2/DC/PT/STAR/ICV, Cadence Genus/Innovus/Tempus).

Preferred Qualifications

• Bachelor's degree in Electrical Engineering, Computer Science, or Computer Engineering.

• 4+ years ASIC design, verification, or related work experience.

• 2+ years experience with architecture and design tools.

• 2+ years experience with scripting tools and programming languages.

• 2+ years experience with design verification methods.

Minimum Qualifications:

• Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or related field and 2+ years of Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.

Master's degree in Electrical Engineering, Computer Science, Computer Engineering, or related field and 1+ year of Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.

PhD in Electrical Engineering, Computer Science, Computer Engineering, or related field.

• 2+ years of experience with high-performance microprocessor design.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range:

$108,000.00 - $162,000.00