Collaborating with experienced verification engineers to conduct comprehensive verification of hardware IPs, including developing test plans, creating test benches, and running simulations.
Exploring and studying industry-standard verification methodologies, such as UVM (Universal Verification Methodology), to enhance the efficiency and effectiveness of the verification process.
Working closely with design engineers to identify and debug issues, perform coverage analysis, and contribute to the overall verification strategy.
Participating in cross-functional team discussions and design reviews to gain insights into the entire IP development process.
What we need to see:
Currently pursuing a Master's degree (or equivalent experience) in Electrical Engineering (EE), Computer Science (CS), or a related field.
Strong understanding of digital design concepts and basic knowledge of hardware description languages, such as Verilog or VHDL.
Demonstrated ability to learn quickly, adapt to new technologies, and solve complex problems.
Excellent communication and teamwork skills.
Ways to stand out from the crowd:
Proficiency in scripting languages, particularly Python, to develop automation tools and improve verification efficiency.
Solid mathematical foundation and familiarity with mathematical algorithms used in verification.
Familiarity with industry-standard verification tools and methodologies, such as SystemVerilog and UVM.