Intel SOC Design Verification Engineer 

United States, Texas, Austin 

916032116

As a SOC Design Verification Engineer intheNetwork and Edge group you will:

• Perform functional logic verification of an integrated SoC to ensure design will meet specifications.
• Define and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.
• Execute verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs.
• Replicate, root causes, and debug issues in the pre-silicon environment.
• Finds and implements corrective measures to resolve failing tests.
• Collaborate and communicates with SoC architects, microarchitects, full chip architects, RTL developers, post-silicon, and physical design teams to improve verification of complex architectural and microarchitectural features.
• Document test plans and drives technical reviews of plans and proofs with design and architecture teams.
• Incorporate and executes security activities within test plans, including regression and debug tests, to ensure security coverage.
• Maintain and improves existing functional verification infrastructure and methodology.
• Absorb learning from post-silicon on the quality of validation done during pre-silicon development, updates test plan for missing coverages, and proliferates to future products.

The ideal candidate will have the following skills in addition to the qualifications listed below.

• Hands-on.
• Fast learner.
• Strong and creative problem-solving skills.
• Good communication skills.

What we need to see(Minimum Qualifications):

• The candidate must possess a Bachelor's degree in Electrical or Computer Engineering, Computer Science and 1+ years of experience or a Master's degree in Electrical or Computer Engineering, Computer Science.
• 1+ years of experience in:
  • OVM/UVM with functional verification
  • Working with RTL, Verilog/System Verilog
  • Synopsys or Cadence or other industry standard simulation tools.

How to Stand out(Preferred Qualifications):

• Master's degree in Electrical or Computer Engineering, Computer Science and 4+ years of experience.
• Experience in RTL design and IP integration.
• Experience in relevant Pre-Silicon validation position.
• Experience Using Perl or Python.
• Experience with coverage and SVA.
• Experience in logic design/verification with various tools and methodologies.
• Experience with global flows - reset, boot and power management.
• Experience with Emulation

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and orschoolwork/classes/research